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  • Comment: Red text, sentences missing citations, promotional language, lacks context for a general audience. Not sure if it sufficiently demonstrates notability. Caleb Stanford (talk) 05:48, 6 June 2025 (UTC)
  • Comment: The topic may be notable but currently reads like an advertisement.
    Can you please revise the article to provide context to a general audience? The article focuses too much on architecture and applications. Why is this topic notable according to independent sources? Who has talked about it and what have they said?
    Also, the article is missing a lead. Include the "Apache TVM" section as a lead instead of as the first section.
    Please address the above and resubmit. Thanks! Caleb Stanford (talk) 02:01, 5 June 2025 (UTC)

Apache TVM
Developer(s)Apache Software Foundation
Initial release2017
Written inPython (programming language), C++
TypeCompiler
Websitetvm.apache.org

Apache TVM (Tensor Virtual Machine) is an open source machine learning optimizing compiler. It supports machine learning models written in frameworks such as TensorFlow, PyTorch, and ONNX and compiles to target platforms including central processing units, graphics processing units, and field-programmable gate arrays.[citation needed]

Originally developed at the University of Washington, TVM has been adopted by several companies including Amazon Web Services[1] , AMD[2], Nvidia[3] , and Qualcomm.[4]

History

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TVM was developed as a research project at the University of Washington in 2017 by Tianqi Chen and the SAMPL group[clarification needed] at the Paul G. Allen School of Computer Science and Engineering.[citation needed] It was published at the 2018 Symposium on Operating Systems Design and Implementation.[5] The project entered the Apache Incubator in March 2019 as part of the process for becoming an official Apache Software Foundation project.[citation needed]

Architecture

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TVM is composed of several major components:

Relay IR: Relay IR is a high-level functional intermediate representation (IR) to represent neural networks prior to low-level optimization and code generation.[citation needed] Introduced as a successor to NNVM IR, Relay encodes computation graphs as abstract syntax trees and includes features such as first-class functions, recursion, and a dependent-like type system that supports shape and tensor types.[citation needed]

Relay supports model transformation through a functional programming paradigm. It uses a Static single-assignment form in which expressions are bound to named variables.[citation needed] Relay includes a Python interface for building and manipulating computation graphs.[citation needed]

import tvm
from tvm import relay

# Define a simple function using Relay
def simple_addition(x, y):
    return relay.add(x, y)

# Create Relay variables for the function
x = relay.var("x", relay.TensorType((3, 3), dtype="float32"))
y = relay.var("y", relay.TensorType((3, 3), dtype="float32"))

# Call the function
add_fn = simple_addition(x, y)

Relay supports reverse-mode automatic differentiation by transforming functions to compute both output values values and corresponding partial derivatives by employing functional techniques such as dual numbers and dynamic closures for backpropagation.[citation needed] This enables differentiation for higher-order functions and models with complex control flow.[6]

TE (Tensor Expression) language: A domain-specific language to represent low-level tensor computations. It includes transformations such as loop reordering, memory layout modifications, and parallel execution for performance optimization.[citation needed]

AutoTVM and Ansor: AutoTVM and Ansor are automated tuning systems used to optimize performance of tensor computations. AutoTVM uses machine learning models and statistical techniques to identify scheduling parameters that improve runtime efficiency across different hardware targets. Ansor extends this approach with search-based methods to explore a broader configuration space.[7][8]

BYOC (Bring Your Own Codegen): A plugin mechanism enabling integration of external code generation backends. It supports the use of hardware-specific instruction sets, libraries, and custom optimizations for specialized or proprietary hardware platforms.[citation needed]

Applications

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Apache TVM has been applied in embedded systems, data center inference workloads, and edge computing devices.[citation needed] Cloud providers and hardware vendors including AWS, AMD, ARM, and Qualcomm have adopted TVM for compiling deep learning workloads to run on specific hardware platforms.[9] [10] [11]

In research contexts, TVM has been used for topics such as automatic scheduling, hardware-aware neural architecture search, and integration with compiler infrastructures such as LLVM and MLIR.[citation needed]

See also

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References

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  1. ^ "Introducing NNVM Compiler: A New Open End-to-End Compiler for AI Frameworks". Amazon Web Services. June 28, 2017. Retrieved June 5, 2025.
  2. ^ "Apache TVM". AMD Documentation. Retrieved June 5, 2025.
  3. ^ "Using Apache TVM for Automatic, Machine Learning-powered TensorCore Code Generation". NVIDIA. November 2021. Retrieved June 5, 2025.
  4. ^ "TVM Open Source Compiler Now Includes Initial Support for Qualcomm Hexagon DSP". Qualcomm Developer Blog. October 2020. Retrieved June 5, 2025.
  5. ^ Chen, Tianqi, et al. "TVM: An Automated End-to-End Optimizing Compiler for Deep Learning." OSDI 2018. [1]
  6. ^ Roesch, Jared, et al. "Relay: A New IR for Machine Learning Frameworks." Proceedings of the 2nd ACM SIGPLAN International Workshop on Machine Learning and Programming Languages (MAPL '18), 2018. [2]
  7. ^ Zheng, Lianmin, et al. "Ansor: Generating High-Performance Tensor Programs for Deep Learning." OSDI 20, 2020. [3]
  8. ^ Kwon, Donggyu, et al. "Learning to Optimize Tensor Programs with a Graph-Based Approach." ICLR 2021. [4]
  9. ^ AWS Labs. "AWS Neuron SDK and Apache TVM." GitHub Repository. [5]
  10. ^ AMD. "Accelerate PyTorch Models using torch.compile on AMD GPUs with ROCm." AMD Developer Blog, 2023. [6]
  11. ^ Arm Developer. "Resources for Ethos-U." [7]